Cyclic Redundancy Check (CRC)
Overview
General Description
The default use of the Cyclic Redundancy Check (CRC) component is to compute the CRC from a serial bit stream of any length. The input data is sampled on the rising edge of the data clock. The CRC value is reset to 0 before starting or can optionally be seeded with an initial value. On completion of the bitstream, the computed CRC value may be read out.
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1 to 64 bits
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Time Division Multiplexing mode
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Requires clock and data for serial bit stream input
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Serial data in, parallel result
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Standard [CRC-1 (parity bit), CRC-4 (ITU-T G.704), CRC-5-USB, etc.] or custom polynomial
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Standard or custom seed value
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Enable input provides synchronized operation with other components
Support